1. Field of the Invention
The present invention relates to a semiconductor device, a method for manufacturing the semiconductor device, and a method for controlling the semiconductor device.
2. Description of the Related Art
High-voltage discrete semiconductors play a major role in power conversion equipment. For example, IGBTs (Insulated Gate Bipolar Transistors), MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), FWDs (Free Wheeling Diodes), etc. are known as discrete semiconductors.
IGBT on-state voltage drops due to conductivity modulation in a drift region. Due to this property, IGBTs are often used for applications to high-voltage equipment. RB-IGBTs (Reverse Blocking IGBTs) are also known. An RB-IGBT has a termination structure in which a pn junction between a collector region and a drift region of the IGBT is extended from the back surface of a semiconductor chip to the front surface thereof. In the RB-IGBT, a high reverse breakdown voltage can be secured even when a reverse voltage is applied to the pn junction between the collector region and the drift region.
In recent years, power conversion equipment with high conversion efficiency has been in widespread use in the power electronics field due to increasing awareness of realization of a low-carbon society with a reduced amount of carbon oxide (CO2) emissions. Replacement of conventional 2-level converters with higher-efficiency 3-level converters of an NPC (Neutral Point Clamped) system or an advanced NPC (A-NPC) system has also progressed in equipment such as UPS (Uninterruptible Power Supplies) or photovoltaic PCS (Power Conditioning Systems).
In an NPC 3-level converter, intermediate potential (output point potential) between two IGBTs connected in series as two main switches is clamped by a diode in order to improve the conversion efficiency. On the other hand, in an A-NPC 3-level converter (hereinafter referred to as “A-NPC circuit”), intermediate potential between two IGBTs connected in series as two main switches is clamped by a bidirectional switch consisting of combination of IGBTs and FWDs in order to improve the conversion efficiency. FIGS. 32 and 33 are circuit diagrams showing typical configurations of A-NPC 3-level converters. The A-NPC circuit shown in FIG. 32 has a main switch 100, a bidirectional switch 110 and a DC link capacitor 120.
The main switch 100 is constituted by IGBTs 101 and 102 connected in series, and FWDs 103 and 104 connected in parallel to the IGBTs 101 and 102. The bidirectional switch 110 is constituted by the combination of IGBTs 111 and 112 and FWDs 113 and 114. The FWDs 113 and 114 secure a reverse breakdown voltage. The bidirectional switch 110 is connected to an intermediate potential point of the main switch 100, that is, a connection point 105 between the IGBTs 101 and 102 so as to clamp the intermediate potential of the main switch 100. The DC link capacitor 120 is constituted by capacitors 121 and 122 each having voltage half as high as DC power supply VDC. The voltage of the DC link capacitor 120 is controlled by the bidirectional switch 110 connected to a connection point 123 between the capacitors 121 and 122.
Moreover, the IGBTs 111 and 112 and the FWDs 113 and 114 constituting the bidirectional switch 110 in the A-NPC circuit shown in FIG. 32 may be replaced by two RB-IGBTs so that the efficiency can be further enhanced. Specifically, in an A-NPC circuit shown in FIG. 33, a bidirectional switch 130 is constituted by RB-IGBTs 131 and 132 connected in anti-parallel. The end portion of the bidirectional switch 130 where the collector of the RB-IGBT 131 and the emitter of the RB-IGBT 132 are connected is connected to the intermediate potential point (connection point 105) of the main switch 100. The end portion of the bidirectional switch 130 where the emitter of the RB-IGBT 131 and the collector of the RB-IGBT 132 are connected is connected to the connection point 123 between the capacitors 121 and 122. When the bidirectional switch 130 is arranged using the RB-IGBTs 131 and 132, the number of parts can be reduced and the on-resistance can be lowered. Thus, the conversion efficiency can be further enhanced.
Next, the configuration of an IGBT in the related art will be described along an example of an IGBT with a planer gate structure. FIG. 34 is a sectional view showing the configuration of an IGBT in the related art. As shown in FIG. 34, a p base region 142 is selectively provided on one side of an n− drift region 141. An n+ emitter region 143 is selectively provided inside the p base region 142. A gate electrode 146 is provided on the surface of a portion of the p base region 142 which is located between the n+ emitter region 143 and the n− drift region 141, so that a gate insulating film 145 is put between the gate electrode 146 and the p base region 142.
An emitter electrode 147 short-circuits the p base region 142 with the n+ emitter region 143. On the other hand, the emitter electrode 147 is electrically isolated from the gate electrode 146 by a not-shown interlayer insulating film. A p collector region 148 is provided over all of the other side of the n− drift region 141. An n buffer region 150 is provided between the n− drift region 141 and the p collector region 148 so as to touch the n− drift region 141 and the p collector region 148. A collector electrode 149 touches the p collector region 148.
Next, the configuration of an FWD in the related art will be described. FIG. 35 is a sectional view showing the configuration of an FWD in the related art. As shown in FIG. 35, an n low-resistance region 152 is provided over all of one side of an n− drift region 151. An n+ cathode region 153 is provided over all of an opposite side of the n low-resistance region 152 to the n− drift region 151. A p anode region 154 is provided over all of the other side of the n− drift region 151. A cathode electrode 155 touches the n+ cathode region 153. A cathode electrode 156 touches the p anode region 154.
Next, the configuration of an RB-IGBT in the related art will be described. FIG. 36 is a sectional view showing the configuration of an RB-IGBT in the related art. As shown in FIG. 36, a p base region 142, an n+ emitter region 143, a gate insulating film 145, a gate electrode 146 and an emitter electrode 147 are provided on one side of an n− drift region 141 in an active region 140 in the same manner as in the IGBT shown in FIG. 34. An n region 161 is provided between the n− drift region 141 and the p base region 142. A p collector region 148 and a collector electrode 149 are provided on the other side of the n− drift region 141 in the same manner as in the IGBT shown in FIG. 34.
A p+ isolation region (through silicon isolation region) 170 is provided in the outer circumferential portion of the n− drift region 141 so as to penetrate the n− drift region 141 from one side of the n− drift region 141 and reach the p collector region 148. A field stopper electrode 171 is electrically connected to the p+ isolation region 170. A terminal structure 180 is provided between the p+ isolation region 170 and the active region 140. The terminal structure 180 is constituted by a floating p region 181 selectively provided on one side of the n− drift region 141, and a field plate electrode 182 electrically connected to the p region 181. The reference numerals 144 and 162 represent a p+ contact region and an interlayer insulating film.
Another RB-IGBT has been proposed, wherein the thickness of the outer circumferential portion of an n− drift region 141 is made smaller than the thickness of the active region side by a groove provided in the outer circumferential portion of the n− drift region 141 (for example, see David. H. Lu et al., “1700V Reverse-Blocking IGBTs with V-Groove Isolation Layer for Multi-Level Power Converters”, Nuremberg, PCIM Europe 2012 (Power Conversion Intelligent Motion Europe 2012), May 8-10, 2012, p. 815-821). The configuration of the RB-IGBT according to the aforementioned non-patent literature will be described with reference to FIG. 37. FIG. 37 is a sectional view showing another example of the configuration of an RB-IGBT in the related art. As shown in FIG. 37, a groove 172 is provided on the other side of the n− drift region 141 so as to reach a p+ isolation region 170a. 
The p collector region 148 extends to form a p collector region 170b on a side wall of the groove 172. The p+ isolation region 170a provided on one side of the n− drift region 141 and the p collector region 148 provided on the other side of the n− drift region 141 are coupled by the p collector region 170b provided on the side wall of the groove 172. The collector electrode 149 is provided to spread from the p collector regions 148 and 170b to the p+ isolation region 170a. The other configuration of the RB-IGBT shown in FIG. 37 is the same as that of the RB-IGBT shown in FIG. 36.
When a voltage not lower than a threshold voltage is applied to the gate electrode 146 in the aforementioned IGBT (FIG. 34) or RB-IGBT (FIG. 36 or 37), a channel which allows electrons to flow into the p base region 142 near the gate insulating film 145 is formed so that a fixed voltage drop occurs between the n− drift region 141 and the n+ emitter region 143 so as to allow a current to flow therein (continuity state). The voltage drop in the rated current is referred to as on-state voltage Von. At that time, electrons are injected into the n− drift region 141 from the n+ emitter region 143 side while positive holes are injected likewise from the p collector region 148 side.
Thus, in the continuity state, many more positive holes and electrons (bipolar carriers) than in the dopant concentration on the p collector region 148 side are in the n− drift region 141. The on-state voltage Von can be reduced as the number of bipolar carrier injected into the n− drift region 141 increases. However, with a larger number of bipolar carriers injected into the n− drift region 141, the time to reach a state of equilibrium is elongated, and a turn-on loss Eon is increased. Thus, a trade-off relationship is established between the on-state voltage Von and the turn-on loss Eon.
On the other hand, when the voltage applied to the gate electrode 146 is made not higher than the threshold value in the continuity state, the bipolar carriers in the n− drift region 141 move from the n− drift region 141 to the other regions. Thus, an electron barrier is formed between the n− drift region 141 and the n+ emitter region 143 so as to block a current (current blocking state). A turn-off loss Eoff is generated during the process in which the bipolar carriers in the n− drift region 141 are ejected to change over from the continuity state to the current blocking state. Thus, a trade-off relationship is established between the on-state voltage Von and the turn-off loss Eoff.
Also in the aforementioned FWD (FIG. 35), the on-state voltage Von is reduced due to conductivity modulation in the n− drift region 151 caused by the carrier injection into the n− drift region 151 in the continuity state. As a result, a forward voltage VF is lowered. On the other hand, during the process in which the carriers injected into the n− drift region 151 are ejected from the n− drift region 151 to change over to a reverse recovery state, a reverse recovery loss Err increases as the number of carriers injected into the n− drift region 151 is larger. Thus, a trade-off relationship is established between the forward voltage VF and the reverse recovery loss Err.
In the aforementioned A-NPC circuit shown in FIG. 33, the FWDs 103 and 104 of the main switch 100 are brought into the reverse recovery state when the RB-IGBTs 131 and 132 (or the IGBTs 111 and 112 in the A-NPC circuit shown in FIG. 32) turn on. On the other hand, when the RB-IGBTs 131 and 132 engage in reverse recovery in a diode mode (or the FWDs 113 and 114 in the A-NPC circuit shown in FIG. 32 engage in reverse recovery), the IGBTs 101 and 102 constituting the main switch 100 turn on.
Thus, in order to suppress the total electric loss in the A-NPC circuit shown in FIG. 33, it is necessary to reduce not only the turn-off loss Eoff of the RB-IGBTs 131 and 132 (or the IGBTs 111 and 112 shown in FIG. 32) but also the reverse recovery loss Err of the RB-IGBTs 131 and 132 in the diode mode (or the FWDs 113 and 114 shown in FIG. 32), the turn-on loss Eon of the IGBTs 101 and 102 constituting the main switch 100, the turn-on loss Eon of the RB-IGBTs 131 and 132 (or the IGBTs 111 and 112 shown in FIG. 32), and the reverse recovery loss Err of the FWDs 103 and 104 of the main switch 100.
An FS (Field Stop) structure is publicly known as a low-loss IGBT. In the FS structure, an n− drift region is thinner than in an NPT (Non Punch Through) structure in which a depletion layer extended from the emitter side does not reach the collector side in the off state, and an n region with a higher impurity concentration than the n− drift region is provided on the collector side. An FS-IGBT (Field Stop IGBT) has characteristics in that the number of holes injected from the collector to the n− drift region is small, and the carrier life time of the n− drift region is long. Thus, both low on-state voltage and low switching loss (turn-on loss and turn-off loss) can be achieved.
A typical FWD has characteristics in that the thickness of the n− drift region 151 is small, the number of holes injected from the p anode region 154 is small, and the carrier life time of the n− drift region 151 is short. Thus, both a soft recovery property and low reverse recovery loss can be achieved.
However, in the A-NPC circuit using the RB-IGBTs 131 and 132 as shown in FIG. 33, there is a problem that the total electric loss of the A-NPC circuit increases. The reason is as follows. A typical RB-IGBT has an NPT structure having a thicker drift region than in an FS structure in order to make the forward breakdown voltage and the reverse breakdown voltage compatible. In addition, in the RB-IGBT, a collector region with a comparatively high concentration is formed to prevent the depletion layer extending from the emitter side from being punched through on the collector side when a reverse voltage is applied. Thus, the number of holes injected from the collector side to the drift region increases. In addition, in the RB-IGBT, the carrier life time of the drift region is adjusted to be short enough to suppress the switching loss (the turn-off loss Eoff, the turn-on loss Eon, and the reverse recovery loss Err).
That is, the RB-IGBT does not have the aforementioned characteristic as FS-IGBT or FWD. Thus, when the A-NPC circuit is operated by a related-art driving method so as to bring the RB-IGBTs 131 and 132 into reverse recovery in a diode mode, there occurs a problem that the peak of a reverse recovery current IAK (hereinafter referred to as “reverse recovery current peak Irp”) increases (hard recovery), the peak of a jump voltage VAK (hereinafter referred to as “jump voltage peak Vrp”) increases due to oscillation, and the reverse recovery loss increases. Further, there occurs a problem that the turn-on loss Eon of the IGBTs 101 and 102 constituting the main switch 100 also increases. Thus, the total electric loss of the A-NPC circuit increases due to the increasing electric loss in the RB-IGBTs 131 and 132 and the IGBTs 101 and 102.